• DocumentCode
    642620
  • Title

    Metastability characterization for muller C-elements

  • Author

    Polzer, Thomas ; Steininger, Andreas

  • Author_Institution
    Embedded Comput. Syst. Group, Vienna Univ. of Technol., Vienna, Austria
  • fYear
    2013
  • fDate
    9-11 Sept. 2013
  • Firstpage
    164
  • Lastpage
    171
  • Abstract
    We1 present an approach for experimental metasta-bility characterization of Muller C-elements. It is based on the late transition detection scheme known from flip flop characterization. Substantial additional challenges arise from the facts that with the Muller C-element the input transition to use as a reference for the output delay may change from case to case, and the error flags of the detector need to be reliably synchronized into the other timing domain. Our solution strategy involves taking measurements concurrently and sorting out irrelevant results later on. This is done based on detailed information about type and relative position of input transitions as well as type and polarity of the output transition, for the collection of all of which we propose efficient means. An example study on an FPGA platform proves the applicability and correct operation of our approach.
  • Keywords
    asynchronous circuits; field programmable gate arrays; flip-flops; logic design; FPGA platform; error flags; flip flop characterization; late transition detection scheme; metastability characterization; muller C elements; output delay; Clocks; Delays; Detectors; Image edge detection; Synchronization;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Power and Timing Modeling, Optimization and Simulation (PATMOS), 2013 23rd International Workshop on
  • Conference_Location
    Karlsruhe
  • Type

    conf

  • DOI
    10.1109/PATMOS.2013.6662170
  • Filename
    6662170