High level tranforms toreduce energy consumption of signal and image processing operators

Author

Ye, Hongxia ; Lacassagne, Lionel ; Falcou, J. ; Etiemble, D. ; Cabaret, L. ; Florent, O.

Author_Institution

ST Microelectron., Grenoble, France

fYear

2013

fDate

9-11 Sept. 2013

Firstpage

247

Lastpage

254

Abstract

High Level Synthesis for Systems on Chip is a challenging way to cut off development time, while assuming a good level of performance. But the HLS tools are limited by the abstraction level of the description to perform some high level transforms. This paper evaluates the impact of such high level transforms for ASICs. We have evaluated recursive and non recursive filters for signal processing an morphological filters for image processing. We show that the impact of HLTs to reduce energy consumption is high : from ×3.4 for one 1D filter up to ×5.6 for cascaded 1D filters and about ×3.5 for morphological 2D filters.

Keywords

energy consumption; high level synthesis; image processing; performance evaluation; recursive filters; system-on-chip; ASIC; HLS tools; HLT; cascaded 1D filters; energy consumption; high level synthesis; high level transform; image processing operators; morphological 2D filters; nonrecursive filters; signal processing operators; systems on chip; Arrays; Finite impulse response filters; Optimization; Registers; Signal processing algorithms; Software; Transforms; ASIC; High Level Synthesis; High Level Transforms; algorithm transforms; energy optimization; image processing; power consumption; signal processing; software optimizations;

fLanguage

English

Publisher

ieee

Conference_Titel

Power and Timing Modeling, Optimization and Simulation (PATMOS), 2013 23rd International Workshop on

Conference_Location

Karlsruhe

Type

conf

DOI

10.1109/PATMOS.2013.6662183

Filename

6662183