Live demonstration: Ethernet communication linking two large-scale neuromorphic systems

With neuromorphic VLSI hardware rapidly moving towards large-scale, possibly immovable systems capable of implementing brain-scale neural models in hardware, there is an emerging need to be able to integrate multi-system combinations of sensors and cortical processors over distributed, multisite configurations. In a recent paper, we proposed a UDP-based AER spiking interface that permits direct bidirectional spike communications over standard networks [1]. Our chosen test case for the demonstration is communication between a large-scale digital neuromorphic system, SpiNNaker [2] and wafer-scale mixed-signal neuromorphic system, BrainScaleS [3]. Since SpiNNaker processors are entirely general-purpose, it is possible to use any given core on a chip for management and system functions. We implemented the UDP interface as a packet interceptor within the Monitor on the chip connected directly to the Ethernet interface. On the BrainScales side, a dedicated FPGA board handles all external communication and configuration of the mixed-signal hardware [4]. The UDP pulse packets use the Ethernet contained on the FPGA board.