Design and analysis of novel dynamic latched comparator with reduced kickback noise for high-speed ADCs

A novel dynamic latched comparator with reduced kickback noise for high-speed ADCs is presented. Dynamic latched comparators suffer from kickback noise. Especially the common-mode kickback noise becomes even more critical in applications with asymmetric input. By using common source input transistors and a decoupling mechanism the novel dynamic latched comparator produces much lower common-mode kickback noise, while the differential kickback noise is also significantly reduced. The simulated results show that the proposed comparator not only produces less than one third of the common-mode kickback noise of other typical dynamic latched comparators, but also settles faster.