DocumentCode :
642727
Title :
A configurable sampling rate converter for all-digital 4G transmitters
Author :
Roverato, Enrico ; Kosunen, Marko ; Lemberg, Jerry ; Nieminen, Tuomo ; Stadius, Kari ; Ryynanen, Jussi ; Eloranta, P. ; Kaunisto, Risto ; Parssinen, Aarno
Author_Institution :
Sch. of Electr. Eng., Dept. of Micro- & Nanosci., Aalto Univ., Espoo, Finland
fYear :
2013
fDate :
8-12 Sept. 2013
Firstpage :
1
Lastpage :
4
Abstract :
This paper presents a digital interpolation chain for non-integer variable-ratio sampling rate conversion, targeted to 4G mobile applications. Such a system is needed in all-digital transmitters, where the sampling rate of the digital input to the RF front-end must be an integer fraction of the carrier frequency. A highly configurable architecture is proposed to cope with the flexibility needed in 4G applications. The system achieves excellent ACLR of 75 dB, EVM degradation of 0.05%, and RX-band noise below -160 dBc/Hz. Digital synthesis of the circuit in a 40nm low-power CMOS process results in a core area of only 0.073 mm2. The estimated power consumption is between 6 and 29 mW, depending on channel bandwidth and transmission band.
Keywords :
4G mobile communication; CMOS digital integrated circuits; UHF frequency convertors; energy consumption; radio transmitters; wireless channels; 4G mobile application; ACLR; EVM degradation; RF circuit; RX-band noise; all-digital 4G transmitter; carrier frequency; digital interpolation chain; digital synthesis; integer fraction; low-power CMOS process; noninteger variable-ratio sampling rate conversion; power consumption; Bandwidth; Clocks; Interpolation; Noise; Power demand; Radio frequency; Radio transmitters;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuit Theory and Design (ECCTD), 2013 European Conference on
Conference_Location :
Dresden
Type :
conf
DOI :
10.1109/ECCTD.2013.6662279
Filename :
6662279
Link To Document :
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