DocumentCode :
642794
Title :
A novel compilation approach for image processing graphs on a many-core platform with explicitly managed memory
Author :
Lepley, T. ; Paulin, Pierre ; Flamand, Eric
Author_Institution :
STMicroelectron., Grenoble, France
fYear :
2013
fDate :
Sept. 29 2013-Oct. 4 2013
Firstpage :
1
Lastpage :
10
Abstract :
Explicitly managed memory many-cores (EMM) have been a part of the industrial landscape for the last decade. The IBM CELL processor, general-purpose graphics processing units (GP-GPU) and the STHORM embedded many-core of STMicroelectronics are representative examples. This class of architecture is expected to scale well and to deliver good performance per watt and per mm2 of silicon. As such, it is appealing for application problems with regular data access patterns. However, this moves significant complexity to the programmer who must master parallelization and data movement. High level programming tools are therefore essential in order to allow the effective programming of EMM many-cores to a wide class of programmers. This paper presents a novel approach designed for simplifying the programming of EMM many-core architectures. It initially addresses the image processing application domain and has been targeted to the STHORM platform. It takes a high-level description of the computation kernel algorithm and generates an OpenCL kernel optimized for the target architecture, while managing the parallelization and data movements across the hierarchy in a transparent fashion. The goal is to provide both high productivity and high performance without requiring parallel computing expertise from the programmer, nor the need for application code specialization for the target architecture.
Keywords :
graph theory; graphics processing units; image processing; memory architecture; multiprocessing systems; EMM many-core architectures; GP-GPU; IBM CELL processor; OpenCL kernel generation; STHORM embedded many-core; STMicroelectronics; compilation approach; computation kernel algorithm; data access patterns; data movement; explicitly managed memory many-core platform; general-purpose graphics processing units; high level programming tools; image processing application domain; image processing graphs; parallelization movement; Abstracts; Computer architecture; Image processing; Kernel; Optimization; Programming; Tiles; Compiler, Parallelization, Productivity, Many; DMA; Image Processing; OpenCL; Performance; Tiling; core;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Compilers, Architecture and Synthesis for Embedded Systems (CASES), 2013 International Conference on
Conference_Location :
Montreal, QC
Type :
conf
DOI :
10.1109/CASES.2013.6662510
Filename :
6662510
Link To Document :
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