DocumentCode :
646710
Title :
Comparative study of transmission lines design for 2.5D silicon interposer
Author :
Siming Pan ; Achkir, Brice
Author_Institution :
Cisco Syst., Inc., San Jose, CA, USA
fYear :
2013
fDate :
5-9 Aug. 2013
Firstpage :
312
Lastpage :
316
Abstract :
In this paper, we present the results of a comparative study performed on six commonly used on-chip differential trace designs in newly emerging 2.5D silicon interposer with high-speed signalling. A generic equivalent circuit model is proposed based on physical geometry. The circuit model is compatible for all the trace structures studied. Impacts of circuit elements in the model are explained theoretically with a physics-based design optimization method. Tradeoff between channel performance and I/O numbers for various trace designs are also discussed in the paper. Unequalized eye of a 10Gb/s simulated transmitter with the best selected on-chip transmission lines geometries showing the possibility to achieve successful communication for 10 Gb/s signal through 40-mm interconnects on the silicon interposer.
Keywords :
coplanar waveguides; elemental semiconductors; equivalent circuits; integrated circuit interconnections; network topology; silicon; generic equivalent circuit model; high speed signalling; on chip differential trace designs; on chip transmission lines geometries; physical geometry; silicon interposer; transmission lines design; Coplanar waveguides; Integrated circuit interconnections; Integrated circuit modeling; Metals; Silicon; Substrates; System-on-chip; Silicon interposer; coplanar waveguide; on-chip transmission line; signal integrity;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electromagnetic Compatibility (EMC), 2013 IEEE International Symposium on
Conference_Location :
Denver, CO
ISSN :
2158-110X
Print_ISBN :
978-1-4799-0408-2
Type :
conf
DOI :
10.1109/ISEMC.2013.6670429
Filename :
6670429
Link To Document :
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