Investigation of the ESD induced clock disturbances in portable electronic products

Author

Pilla, Viswa ; Maheshwari, Pushp ; Tianqi Li ; Pommerenke, David J. ; Maeshima, Junji ; Shumiya, Hideki ; Yamada, Tomoaki ; Araki, Kotaro

Author_Institution

EMC Lab., Missouri Univ. of Sci. & Technol., Rolla, MO, USA

fYear

2013

fDate

5-9 Aug. 2013

Firstpage

343

Lastpage

347

Abstract

ESD events can induce noise on the system clock which may lead to soft-errors in the portable electronic products. This paper presents measurement techniques to investigate the ESD induced clock disturbances. At first, the soft-errors due to system level ESD testing on a DUT are shown. Next, local field scanning and direct injection are performed to identify ESD sensitive areas/traces. Techniques for soft-error threshold measurement using synchronized noise injection techniques are shown. Short time FFT (STFFT) based spectrogram method to investigate the PLL output frequency deviation due to the clock line noise, is presented.

Keywords

clocks; electronic products; electrostatic discharge; fast Fourier transforms; integrated circuit noise; integrated circuit testing; phase locked loops; radiation hardening (electronics); synchronisation; DUT; ESD induced clock disturbance; PLL output frequency deviation; STFFT; clock line noise; local field scanning; portable electronic product; short time FFT based spectrogram method; soft-error threshold measurement; synchronized noise injection technique; system level ESD testing; Clocks; Electrostatic discharges; Noise; Phase locked loops; Spectrogram; Synchronization; Testing;

fLanguage

English

Publisher

ieee

Conference_Titel

Electromagnetic Compatibility (EMC), 2013 IEEE International Symposium on

Conference_Location

Denver, CO

ISSN

2158-110X

Print_ISBN

978-1-4799-0408-2

Type

conf

DOI

10.1109/ISEMC.2013.6670435

Filename

6670435