DocumentCode :
646813
Title :
A framework for the simulation of electrostatic discharge immunity using the unified circuit modeling technique
Author :
Sekine, Taku ; Asai, Hiroki
Author_Institution :
Dept. of Syst. Eng., Shizuoka Univ., Hamamatsu, Japan
fYear :
2013
fDate :
5-9 Aug. 2013
Firstpage :
869
Lastpage :
874
Abstract :
In this paper, we describe a framework for the accurate estimation of electrostatic discharge (ESD) events induced on realistic products. The framework is based on a unified circuit modeling and simulation technique to deal with the environment of an ESD immunity test including a device under test, a ground strap, and an ESD generator. First, the equivalent circuit model of the ESD generator used in a previous work is improved to achieve more accurate results from simulations. For this purpose, the circuit model is modified by adjusting the circuit parameters and inserting circuit elements. Then, we deal with the ESD events on a printed circuit board (PCB) with a chassis for the practical application of our framework. The PCB and chassis are modeled by using the multilayered finite difference method and excited by the modified circuit model of the generator. The adequacy of our approach is demonstrated by comparing the simulation results with measurement results.
Keywords :
electrostatic discharge; finite difference methods; printed circuits; ESD generator; ESD immunity test; electrostatic discharge immunity; equivalent circuit model; multilayered finite difference method; printed circuit board; unified circuit modeling technique; Current measurement; Electrostatic discharges; Equivalent circuits; Fasteners; Generators; Integrated circuit modeling; Voltage measurement;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electromagnetic Compatibility (EMC), 2013 IEEE International Symposium on
Conference_Location :
Denver, CO
ISSN :
2158-110X
Print_ISBN :
978-1-4799-0408-2
Type :
conf
DOI :
10.1109/ISEMC.2013.6670532
Filename :
6670532
Link To Document :
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