• DocumentCode
    646971
  • Title

    Keynote talk III: Industry pulse: Trends in function verification

  • Author

    Foster, H.

  • fYear
    2013
  • fDate
    18-20 Oct. 2013
  • Firstpage
    129
  • Lastpage
    130
  • Abstract
    Recent industry studies point to an accelerated rate at which traditional system-level functionality is being integrated into a single System on Chip (SoC). To address this increasing complexity brought on by higher levels of integration, the industry has been forced to adopt more holistic design and verification flows. For example, it is no longer sufficient to simply track coverage purely at the IP-level - ignoring other interactions related to software and power. This invited talk presents trends uncovered from a recent, large industry study, and discusses current and emerging challenges in the functional verification of electronic systems.
  • Keywords
    IP networks; formal verification; integrated circuit design; system-on-chip; IP level; electronic system; functional verification; holistic design; integrated circuit design; system level functionality; system on chip; Abstracts; Acceleration; Graphics; Industries; Market research; Standards; System-on-chip;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Formal Methods and Models for Codesign (MEMOCODE), 2013 Eleventh IEEE/ACM International Conference on
  • Conference_Location
    Portland, OR
  • Print_ISBN
    978-1-4799-0903-2
  • Type

    conf

  • Filename
    6670949