Title :
Design and Architectural Assessment of 3-D Resistive Memory Technologies in FPGAs
Author :
Gaillardon, Pierre-Emmanuel ; Sacchetto, Davide ; Beneventi, Giovanni Betti ; Ben Jamaa, M. Haykel ; Perniola, L. ; Clermidy, F. ; O´Connor, Ian ; De Micheli, G.
Author_Institution :
Lab. of Syst. Integration, Ecole Polytech. Fed. de Lausanne, Lausanne, Switzerland
Abstract :
Emerging nonvolatile memories (eNVMs) such as phase-change random access memories (PCRAMs) or oxide-based resistive random access memories (OxRRAMs) are promising candidates to replace Flash and Static Random Access Memories in many applications. This paper introduces a novel set of building blocks for field-programmable gate arrays (FPGAs) using eNVMs. We propose an eNVM-based configuration point, a look-up table structure with reduced programming complexity and a high-performance switchbox arrangement. We show that these blocks yield an improvement in area and write time of up to 3× and 33×, respectively, versus a regular Flash implementation. By integrating the designed blocks in an FPGA, we demonstrate an area and delay reduction of up to 28% and 34%, respectively, on a set of benchmark circuits. These reductions are due to the eNVM 3-D integration and to their low on-resistance state value. Finally, we survey many flavors of the technologies and we show that the best results in terms of area and delay are obtained with Pt/TiO2/Pt stack, while the lowest leakage power is achieved by InGeTe stack.
Keywords :
field programmable gate arrays; random-access storage; 3D integration; 3D resistive memory technology; FPGA; Flash; architectural assessment; benchmark circuit; field programmable gate arrays; high performance switchbox arrangement; lookup table structure; nonvolatile memory; oxide based resistive random access memory; phase change random access memory; programming complexity; static random access memory; Field programmable gate arrays; Materials; Phase change random access memory; Programming; Resistance; Switches; 3-D integration; RRAM; nonvolatile memory; oxide memory; phase-change memory; programmable logic arrays;
Journal_Title :
Nanotechnology, IEEE Transactions on
DOI :
10.1109/TNANO.2012.2226747