DocumentCode :
648512
Title :
Analysis of error-detection possibilities of CED circuits based on Hamming and Berger codes
Author :
Sapozhnikov, Vladimir ; Sapozhnikov, Vladimir ; Efanov, Dmitry ; Blyudov, Anton
Author_Institution :
Autom. & Remote Control on Railways Dept., Petersburg State Transp. Univ., St. Petersburg, Russia
fYear :
2013
fDate :
27-30 Sept. 2013
Firstpage :
1
Lastpage :
8
Abstract :
Features of Berger and Hamming codes application in testable logical devices synthesis are described in this paper. Some new error-detection properties of these codes are determined; this is actual for concurrent error detection (CED) systems. Codes´ properties are compared and Hamming code CED system check equipment synthesis method is described on the example of code with 4 informational bits checker design. Berger and Hamming codes´ checkers are compared.
Keywords :
Hamming codes; combinational circuits; error detection codes; logic design; Berger codes application; CED circuits; Hamming codes application; combinational circuits; concurrent error detection systems; error-detection possibility analysis; informational bits checker design; testable logical devices synthesis;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design & Test Symposium, 2013 East-West
Conference_Location :
Rostov-on-Don
Print_ISBN :
978-1-4799-2095-2
Type :
conf
DOI :
10.1109/EWDTS.2013.6673097
Filename :
6673097
Link To Document :
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