• DocumentCode
    648595
  • Title

    Loop nests parallelization for digital system synthesis

  • Author

    Chemeris, Alexander ; Gorunova, Julia ; Lazorenko, Dmiry

  • Author_Institution
    Pukhov Inst. for Modelling in Energy Eng. NASU, Kiev, Ukraine
  • fYear
    2013
  • fDate
    27-30 Sept. 2013
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    A modified method of affine transformations of nested loops is offered. The point of modification is in processing of group of loop operators without data dependencies. The method offered allows to formalize the parallelization process and increase quality of parallelization. As a result efficiency of synthesis of digital circuits increased.
  • Keywords
    affine transforms; digital circuits; electronic design automation; network synthesis; affine transformation; digital circuit synthesis; loop nest parallelization;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design & Test Symposium, 2013 East-West
  • Conference_Location
    Rostov-on-Don
  • Print_ISBN
    978-1-4799-2095-2
  • Type

    conf

  • DOI
    10.1109/EWDTS.2013.6673180
  • Filename
    6673180
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=648595