Title :
Hardware reduction for compositional microprogram control unit dedicated for CPLD systems
Author :
Barkalov, Alexander ; Titarenko, Larysa ; Smolinski, L.
Author_Institution :
Inst. of Comput. Eng. & Electron., Zielona Góra, Poland
Abstract :
The method of hardware reduction is proposed which is dedicated for compositional microprogram control unit implemented in CPLD. The method is based on using more than one data source in calculation of microinstruction address. Such approach permits to the decrease the number of logic blocks used for the implementation of the controller in the target CPLD. The paper presents the conditions needed to apply the method. An example of the proposed method application is given.
Keywords :
microprogramming; programmable logic devices; CPLD systems; complex programmable logic devices; compositional microprogram control unit; data source; hardware reduction; logic blocks; microinstruction address;
Conference_Titel :
Design & Test Symposium, 2013 East-West
Conference_Location :
Rostov-on-Don
Print_ISBN :
978-1-4799-2095-2
DOI :
10.1109/EWDTS.2013.6673200
