DocumentCode
648673
Title
Minimization of EP-SOPs via Boolean relations
Author
Bernasconi, Anna ; Ciriani, Valentina ; Trucco, Gabriella ; Villa, Tania
Author_Institution
Dipt. di Inf., Univ. di Pisa, Pisa, Italy
fYear
2013
fDate
7-9 Oct. 2013
Firstpage
112
Lastpage
117
Abstract
Generalized Shannon decomposition with remainder restructures a logic function into subsets of points defined by the generalized cofactors with a remainder, yielding three logic blocks. EXOR-Projected Sums of Products (EP-SOPs) are an important form of such decomposition. In this paper we propose a Boolean synthesis technique for EP-SOPs, more general than the algebraic methods investigated so far. We exploit the don´t care conditions induced by the structure of the implementation, by casting synthesis for minimum area as a problem of Boolean relation minimization that captures all valid implementations of the circuit, obtaining by construction the most compact one. We report experiments confirming the effectiveness in area of the proposed approach based on Boolean relations, with better run times for some cost functions.
Keywords
Boolean functions; logic design; minimisation of switching nets; network synthesis; Boolean relation minimization; Boolean synthesis technique; EP-SOP minimization; EXOR-projected sums of product; algebraic methods; cost function; generalized Shannon decomposition; logic block; logic function; minimum area; remainder restructure;
fLanguage
English
Publisher
ieee
Conference_Titel
Very Large Scale Integration (VLSI-SoC), 2013 IFIP/IEEE 21st International Conference on
Conference_Location
Istanbul
Type
conf
DOI
10.1109/VLSI-SoC.2013.6673260
Filename
6673260
Link To Document