DocumentCode
648694
Title
New scan-based attack using only the test mode
Author
Ali, Sk Subidh ; Sinanoglu, Ozgur ; Saeed, Samah Mohamed ; Karri, Ramesh
fYear
2013
fDate
7-9 Oct. 2013
Firstpage
234
Lastpage
239
Abstract
Scan attack is a threat to crypto-chips. An attacker can leverage the test mode of the chip and control the scan chains in order to reveal the secret key. One solution for this kind of attacks is to hamper the ability to switch the device from normal mode to test mode and corrupt the data in the scan cells. If the device is reset each time it switches the mode from normal to test, all existing attacks can be thwarted. We propose a new scan-based attack by controlling only the scan chains and demonstrate it on the AES hardware. The attack uses only the test mode of the hardware and it does not require switching between normal and test mode. The attack will work even in the presence of mode blocking countermeasure. The attack requires only 375 test vectors with an attack time complexity around 212.58.
Keywords
computational complexity; cryptography; design for testability; microprocessor chips; AES hardware; DFT; attack time complexity; crypto-chips; design-for-testability; mode blocking countermeasure; normal mode; scan cells; scan chains; scan-based attack; secret key; test mode; threat; AES; Scan Attack; Scan Chain; Scan-based DFT; Security; Testability;
fLanguage
English
Publisher
ieee
Conference_Titel
Very Large Scale Integration (VLSI-SoC), 2013 IFIP/IEEE 21st International Conference on
Conference_Location
Istanbul
Type
conf
DOI
10.1109/VLSI-SoC.2013.6673281
Filename
6673281
Link To Document