• DocumentCode
    648701
  • Title

    Compressed look-up-table based real-time rectification hardware

  • Author

    Akin, Abdulkadir ; Baz, Ipek ; Gaemperle, Luis Manuel ; Schmid, A. ; Leblebici, Yusuf

  • Author_Institution
    Sch. of Eng. (STI), Ecole Polytech. Fed. de Lausanne (EPFL), Lausanne, Switzerland
  • fYear
    2013
  • fDate
    7-9 Oct. 2013
  • Firstpage
    272
  • Lastpage
    277
  • Abstract
    Stereo image rectification is a pre-processing step of disparity estimation intended to remove image distortions and to enable stereo matching along an epipolar line. A real-time disparity estimation system needs to perform real-time rectification which requires solving the models of lens distortions, image translations and rotations. Look-up-table based rectification algorithms allow image rectification without demanding high complexity operations. However, they require an external memory to store large size look-up-tables. In this work, we present an intermediate solution that compresses the rectification information to fit the look-up-table into the on-chip memory of a Virtex-5 FPGA. The low-complexity decompression process requires a negligible amount of hardware resources for its real-time implementation. The proposed image rectification hardware consumes 0.28% of the DFF and 0.32% of the LUT resources of the Virtex-5 XCUVP-110T FPGA, it can process 347 frames per second for a 1024×768 pixels image resolution, and it does not need the availability of an external memory.
  • Keywords
    data compression; field programmable gate arrays; image matching; image resolution; stereo image processing; table lookup; DFF; LUT resources; Virtex-5 FPGA; epipolar line; image distortions; look-up-table based rectification algorithms; low-complexity decompression process; on-chip memory; real-time disparity estimation system; real-time rectification; stereo image rectification; stereo matching; Compression; FPGA; Hardware Implementation; Image Rectification; Real-Time; Stereo Matching;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Very Large Scale Integration (VLSI-SoC), 2013 IFIP/IEEE 21st International Conference on
  • Conference_Location
    Istanbul
  • Type

    conf

  • DOI
    10.1109/VLSI-SoC.2013.6673288
  • Filename
    6673288