Signal processing challenges for emerging digital intensive and digitally assisted transceivers with deeply scaled technology (Invited)

Mainstream foundries are leaping toward 14nm node and beyond. Although aggressive scaling can substantially improve digital circuit, it is very controversial for analog circuit. However, analog circuit still has to follow the scaling trend because a single chip integration offers key commercial advantages. To optimally achieve the best performance/power/cost tradeoff with deeply scaled technology nodes, there is a clear trend and paradigm shift towards digital intensive and digitally assisted transceivers. Successes of such transceivers have been proven for individual transceiver components and narrow band systems. When targeting emerging communication standards, higher carrier frequencies, further technology scaling and reconfigurable radios, required signal processing design and implementation are orders of magnitudes more challenging but potential gains are promising. Illustrated with a variety of transceivers representing emerging architectures designed for different sub-6GHz and 60GHz communication systems, we will depict key challenges that we experienced in our design and optimization process with 40nm and 28nm technology nodes.