Dynamic sub-compact model and global compact model reduction for multichip components

The trend at the level of electronic component is to gather several active chips inside the same enclosing package. The thriving development of this technology allows reducing the volume in space as well as shortening the interconnection between the elements of the device. In this article, we analyze two methods of reduction of a detailed representation of a component, embedding three chips. The first approach is based upon the sub-compact vision, which consists in generating thermal compact models of different pseudo parts and plugged them within the over-molding resin of the package. This one gives good results but the size of the deducted model remains large. The second way uses a global reduction process by generating a whole network at once by means of genetic algorithm and superposition principle. The predictions of the behavioral models are relevant, poorly dependant of boundary conditions but the number of mandatory fitting scenarios becomes quite significant as well as the parameters to be optimized.