DocumentCode
649576
Title
Scheduling of parallelized synchronous dataflow actors
Author
Zheng Zhou ; Desnos, Karol ; Pelcat, Maxime ; Nezan, Jean-Francois ; Plishker, William ; Bhattacharyya, Shuvra S.
Author_Institution
Dept. of ECE & UMIACS, Univ. of Maryland, College Park, MD, USA
fYear
2013
fDate
23-24 Oct. 2013
Firstpage
1
Lastpage
10
Abstract
Parallelization of Digital Signal Processing (DSP) software is an important trend for MultiProcessor System-on-Chip (MPSoC) implementation. The performance of DSP systems composed of parallelized computations depends on the scheduling technique, which must in general allocate computation and communication resources for competing tasks, and ensure that data dependencies are satisfied. In this paper, we formulate a new type of parallel task scheduling problem called Parallel Actor Scheduling (PAS) for MPSoC mapping of DSP systems that are represented as Synchronous DataFlow (SDF) graphs. In contrast to traditional SDF-based scheduling techniques, which focus on exploiting graph level (inter-actor) parallelism, the PAS problem targets the integrated exploitation of both intra- and inter-actor parallelism for platforms in which individual actors can be parallelized across multiple processing units. We address a special case of the PAS problem in which all of the actors in the DSP application or subsystem being optimized can be parallelized. For this special case, we develop and experimentally evaluate a two-phase scheduling framework with two work flows - particle swarm optimization with a mixed integer programming formulation, and particle swarm optimization with a fast heuristic based on list scheduling. We demonstrate that our PAS-targeted scheduling framework provides a useful range of trade-offs between synthesis time requirements and the quality of the derived solutions.
Keywords
data flow graphs; integer programming; multiprocessing systems; parallel programming; particle swarm optimisation; processor scheduling; resource allocation; signal processing; system-on-chip; DSP software; DSP systems; MPSoC; MPSoC mapping; PAS problem; SDF graphs; SDF-based scheduling techniques; communication resource allocation; data dependency; digital signal processing software; fast heuristic; graph level parallelism; inter-actor parallelism; intra-actor parallelism; list scheduling; mixed integer programming formulation; multiple processing units; multiprocessor system-on-chip; parallel task scheduling problem; parallelized synchronous dataflow actor graph scheduling; particle swarm optimization; two-phase scheduling framework;
fLanguage
English
Publisher
ieee
Conference_Titel
System on Chip (SoC), 2013 International Symposium on
Conference_Location
Tampere
Type
conf
DOI
10.1109/ISSoC.2013.6675271
Filename
6675271
Link To Document