• DocumentCode
    649586
  • Title

    Proactive Thermal-Budget-Based Beltway Routing algorithm for thermal-aware 3D NoC systems

  • Author

    Che-Chuan Kuo ; Kun-Chih Chen ; En-Jui Chang ; An-Yeu Wu

  • Author_Institution
    Grad. Inst. of Electron. Eng., Nat. Taiwan Univ., Taipei, Taiwan
  • fYear
    2013
  • fDate
    23-24 Oct. 2013
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    The thermal problems of three-dimensional Network-on-Chip (3D NoC) systems become more serious because of die stacking. Besides, for high-performance requirement, the minimal adaptive routing algorithms result in unbalanced traffic load and worse temperature distribution in the system. On the other hand, the conventional selection strategies determine the routing path based on the traffic information, which leads to unawareness of the potential thermal hotspot and huge performance impact. To solve the problems, in this paper, we first define a novel thermal-aware routing index, Mean Time To Throttle (MTTT), which represents the remaining active time of the node before the temperature achieves the alarming level. Based on the information of MTTT, we propose a Proactive Thermal-Budget-Based Beltway Routing (PTB3R) to balance the temperature distribution of the NoC system. The experimental results show that the proposed PTB3R can help to reduce the number of throttled nodes by 25.56%~86.95% and improve network throughput by around 15.04%~19.87%.
  • Keywords
    network-on-chip; 3D network-on-chip systems; MTTT; PTB3R; alarming level; die stacking; mean time to throttle; minimal adaptive routing algorithms; network throughput; potential thermal hotspot; proactive thermal budget based beltway routing; proactive thermal budget based beltway routing algorithm; routing path; thermal aware 3D NoC systems; thermal aware routing index; thermal problems; traffic information; unbalanced traffic load; 3D IC; 3D NoC; Proactive Routing; Thermal Budget;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    System on Chip (SoC), 2013 International Symposium on
  • Conference_Location
    Tampere
  • Type

    conf

  • DOI
    10.1109/ISSoC.2013.6675281
  • Filename
    6675281