DocumentCode :
65112
Title :
Single Grain Boundary Tunnel Field Effect Transistors on Recrystallized Polycrystalline Silicon: Proposal and Investigation
Author :
Ram, Mamidala ; Abdi, Dawit
Author_Institution :
Dept. of Electron. & Commun. Eng., M.S. Ramaiah Inst. of Technol., Bangalore, India
Volume :
35
Issue :
10
fYear :
2014
fDate :
Oct. 2014
Firstpage :
989
Lastpage :
991
Abstract :
A single grain boundary tunnel field effect transistor (TFET) on recrystallized polycrystalline silicon is reported in this letter. By varying the position of the grain boundary (GB) in the channel, the performance of the proposed device is evaluated using calibrated 2-D simulations. Our results show the possibility of realizing low-cost thin-film recrystallized polycrystalline tunnel FETs with low OFF-state current and low subthreshold swing compared with the thin-film transistors. By introducing the source N+ pocket doping, it is also shown that the proposed single GB PNPN TFET exhibits enhanced ON-state current, making it suitable for low power display applications, including the driver circuits.
Keywords :
calibration; elemental semiconductors; field effect transistors; grain boundaries; semiconductor doping; silicon; thin film transistors; tunnelling; 2D calibrated simulation; Si; driver circuit; low power display application; recrystallized polycrystalline silicon; single GB PNPN TFET; single grain boundary tunnel field effect transistor; source N+ pocket doping; subthreshold swing; thin-film recrystallized polycrystalline tunnel FET; thin-film transistor; Doping; Grain boundaries; Silicon; Thin film transistors; Tunneling; PNPN TFET; Tunnel field effect transistor (TFET); glass substrates; grain boundary (GB); poly-Si; simulation; thin film transistor (TFT);
fLanguage :
English
Journal_Title :
Electron Device Letters, IEEE
Publisher :
ieee
ISSN :
0741-3106
Type :
jour
DOI :
10.1109/LED.2014.2351260
Filename :
6895307
Link To Document :
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