Title :
An Effective Capacitance Model for 28-nm and Beyond Copper Interconnect
Author :
Yajun Xu ; Fanfei Bai ; Wuping Liu ; Chaoying Xie
Author_Institution :
Dept. of Mater. Sci. & Eng., Shanghai Jiao Tong Univ., Shanghai, China
Abstract :
In 28-nm CMOS technology, copper interconnect becomes complicated as the dielectric copper diffusion barrier and low-κ damage compromise capacitance gain from low-κ implementation. As a consequence, accurate and effective estimation of the interconnect capacitance is a very challenging task during integration and unit process development. This paper attempts to integrate the impacts of the technological innovations and presents a new compact capacitance model by modifying one of the existing empirical models. The new model demonstrates good agreement with Raphael simulation and less than 2% delta to the real Si data at 28-nm node. Effects of the transition layer and the low-κ damage layer on capacitance and the impact of terminal capacitance on the coupling capacitance are discussed in detail.
Keywords :
CMOS integrated circuits; copper; diffusion barriers; integrated circuit interconnections; integrated circuit modelling; low-k dielectric thin films; CMOS technology; Cu; Raphael simulation; copper interconnect; coupling capacitance; dielectric copper diffusion barrier; effective capacitance model; interconnect capacitance estimation; low-κ damage compromise capacitance gain; low-κ damage layer; size 28 nm; terminal capacitance impact; transition layer; unit process development; Capacitance model; copper diffusion barrier; low-$kappa$ damage layer; transition layer;
Journal_Title :
Electron Devices, IEEE Transactions on
DOI :
10.1109/TED.2013.2259237