Bandwidth versus efficiency performance using power combining in GaN HEMT power amplifiers

Transistors manufacturers are increasing the output power of their devices presently by enlarging the gate width of the transistors. This work discusses the tradeoff between the increased parasitic elements and the additional losses introduced by external power combining on board. Design goal of this work was to develop a 100 W power amplifier with optimum efficiency and maximum bandwidth. The first version is equipped with a single 100 W transistor. A second amplifier is realized using two power combined 50 W devices. The preliminary analysis is based on the theory of Bode and Fano. Using this approach the achievable bandwidth is predicted.