DocumentCode :
656985
Title :
Smart image sensing system
Author :
Jie Yang ; Cong Shi ; Zhongxiang Cao ; Ye Han ; Liyuan Liu ; Nanjian Wu
Author_Institution :
State Key Lab. of Superlattices & Microstructures, Inst. of Semicond., Beijing, China
fYear :
2013
fDate :
3-6 Nov. 2013
Firstpage :
1
Lastpage :
4
Abstract :
Vision chips have achieved excellent performance in machine vision applications, but it is insufficient to most industrial applications due to low resolution image sensors and poor image quality. To solve the problems, a smart image sensing system which integrates image sensor and vision chip architecture image processor is proposed. The CMOS image sensor consists of an 800×600 pixel array and two column-parallel ADCs. It is capable of capturing images at 1000 fps. The image processor contains a 64 × 64 processing elements array, 64 row processors, and dual-core RISC. It can exploit data-level parallelism, therefore massively accelerate both low- and middle-level image processing. The proposed image sensing system is successfully applied to various applications like edge detection, motion detection, target tracking at a processing rate of 1000 fps.
Keywords :
CMOS image sensors; analogue-digital conversion; computerised instrumentation; edge detection; image motion analysis; image resolution; intelligent sensors; reduced instruction set computing; target tracking; CMOS image sensor resolution; data-level parallelism; dual-core RISC; edge detection; image processing; image quality; industrial application; machine vision application; motion detection; processor; sensor array; smart image sensing system; target tracking; two column-parallel ADC; vision chip architecture; Arrays; CMOS image sensors; Image processing; Reduced instruction set computing; Sensors; Target tracking;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
SENSORS, 2013 IEEE
Conference_Location :
Baltimore, MD
ISSN :
1930-0395
Type :
conf
DOI :
10.1109/ICSENS.2013.6688261
Filename :
6688261
Link To Document :
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