An FPGA implementation of the AES with fault detection countermeasure

The Advanced Encryption Standard (AES) is used in many embedded systems to provide security. It is become the default choice for security services in numerous applications. Fault injection attacks are powerful cryptanalysis techniques against the AES algorithm. These attacks are based on injecting faults into the structure of the AES to obtain the confidential information. To protect the AES implementation against these attacks, a number of countermeasures have been proposed. In this paper, we present the implementation details of the AES 128-bit encryption and decryption. We conduct a fault injection attack against the unprotected AES. Moreover we proposed a fault detection scheme for the AES. The simulation results show that the fault coverage achieves 99.998%. The protected AES has been implemented on Xilinx Virtex-5 FPGA. Its fault coverage, area overhead, frequency degradation and throughput have been compared and it is shown that the proposed fault detection scheme allows a trade-off between the ability to detect faults and the implementation cost of the AES.