DocumentCode :
658
Title :
Dynamic Modeling of Dual Speed Ferroelectric and Charge Hybrid Memory
Author :
Rajwade, Shantanu R. ; Auluck, Kshitij ; Naoi, Taro A. ; Jayant, Krishna ; Kan, Edwin C.
Author_Institution :
Sch. of Electr. & Comput. Eng., Cornell Univ., Ithaca, NY, USA
Volume :
60
Issue :
10
fYear :
2013
fDate :
Oct. 2013
Firstpage :
3378
Lastpage :
3384
Abstract :
This paper presents a physical model for program and retention transients in ferroelectric (FE) and charge hybrid nonvolatile memory. A region-by-region statistical model for domain switching in polycrystalline FEs was incorporated with the tunneling current simulations to predict the memory window (AVTH) evolution during program and retention operations. The simulations validated the two-step program mechanism experimentally observed in such memories: rapid initial domain switching on account of high fields in the FE layer followed by field enhancement in the tunneling dielectric which initiates electron injection into the storage nodes. Further, these simulations were shown to accurately account for individual ΔVTH from the two additive memory mechanisms at all program times. The depolarization effect was shown to be dominant for ΔVTH loss at short and moderate retention time scales (<;100 s). This model was further used to provide realistic estimates in achieving dual speed program and the corresponding dual mode retention characteristics akin to a DRAM and flash hybrid operation.
Keywords :
dielectric materials; ferroelectric storage; random-access storage; DRAM; charge hybrid nonvolatile memory; depolarization effect; dual mode retention characteristics; dual speed ferroelectric memory; dynamic modeling; electron injection; field enhancement; flash hybrid operation; memory window evolution; polycrystalline FE; program times; program transients; rapid initial domain switching; region-by-region statistical model; retention time scales; retention transients; storage nodes; tunneling current simulations; tunneling dielectric; two-step program mechanism; Ash; Iron; Logic gates; Random access memory; Switches; Transient analysis; Tunneling; DRAM flash; ferroelectric (FE) switching; hybrid memory; modeling;
fLanguage :
English
Journal_Title :
Electron Devices, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9383
Type :
jour
DOI :
10.1109/TED.2013.2279259
Filename :
6589996
Link To Document :
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