Neural network based image denoising with pulse mode operations and hybrid on-chip learning algorithm

This paper proposes a pulse mode neural network (PMNN) based image denoising operation. Known by their outstanding future, PMNN is gaining support in the field of hardware implementation thanks to its significant compactness and higher density of integration. However, early pulse mode implementation suffers from some constraints due to the complexity of the on-chip learning ability, since the back-propagation algorithm is probably the most used, which costs much of hardware resources. To overcome this limitation and to provide an effective hardware implementation, we propose in this paper a hybrid learning algorithm, in which, we apply the K-means algorithm to adjust the centers positions of the basic activation functions, as well as the back-propagation algorithm to update the connection weights. The corresponding design was implemented into the FPGA platform. To evaluate the performance of the proposed approach, we consider image denoising which is a very needed step in image processing. Experimental results show good learning ability and effective generalization test.