Title :
An Efficient Test Methodology for Image Processing Applications Based on Error-Tolerance
Author :
Tong-Yu Hsieh ; Yi-Han Peng ; Chia-Chi Ku
Author_Institution :
Dept. of Electr. Eng., Nat. Sun Yat-sen Univ., Kaohsiung, Taiwan
Abstract :
Error-tolerance is a novel notion that can improve yield of VLSI circuits by identifying defective yet acceptable chips. In this paper we address two key issues related to error-tolerance, namely acceptable threshold determination and acceptability evaluation, focusing on image processing applications. We first carefully investigate the acceptability thresholds of images in terms of error rate and error significance. The investigation results show that due to human beings´ various insensitivities to images with different frequencies, appropriate thresholds should be determined depending on the frequency characteristics of test images. Based on the determined thresholds we propose an efficient test methodology to help test engineers easily and quickly examine the acceptability of a circuit under test. The experimental results for a large number of erroneous benchmark images show that the proposed test methodology is as effective as the exhaustive test method. Moreover, our methodology requires much less test time and storage space. The achievable reduction ratio can be more than 99%.
Keywords :
VLSI; image processing; integrated circuit testing; VLSI circuits; acceptability evaluation; acceptable threshold determination; benchmark images; circuit under test; efficient test methodology; error-tolerance; image processing applications; Benchmark testing; Brightness; Dynamic range; Error analysis; Image processing; PSNR;
Conference_Titel :
Test Symposium (ATS), 2013 22nd Asian
Conference_Location :
Jiaosi Township
DOI :
10.1109/ATS.2013.60