Design considerations for a 33mW, 12.5 Gbps × 8 channel silicon photonic transmitter array

Author

Jon Lexau ; Xuezhe Zheng ; Chang, En-Jui ; Shubin, Ivan ; Guoliang Li ; Ying Luo ; Jin Yao ; Thacker, Hiren ; Jin-Hyoung Lee ; Liu, Frank ; Amberg, P. ; Raj, Kannan ; Cunningham, John E. ; Krishnamoorthy, Ashok V. ; Ho, Ron

Author_Institution

Oracle Labs., Redwood Shores, CA, USA

fYear

2013

fDate

11-13 Nov. 2013

Firstpage

37

Lastpage

40

Abstract

We report on a hybrid assembly combining 40 nm bulk CMOS transmitter circuits, 130 nm SOI optical ring modulators, and off-chip lasers. Silicon resistors in the rings enable circuit-based thermal tuning to overcome process variations, resulting in eight 12.6 Gbps channels operating simultaneously at eight different wavelengths. Not counting laser power but including all transmitter circuits, integration parasitics, and static thermal control, the TX array consumes a total of 33 mW, resulting in a net per-channel efficiency of 330 fJ/b.

Keywords

CMOS integrated circuits; elemental semiconductors; integrated optics; optical modulation; optical transmitters; silicon; silicon-on-insulator; SOI optical ring modulators; bit rate 12.5 Gbit/s; bulk CMOS transmitter circuits; circuit-based thermal tuning; integration parasitics; off-chip lasers; power 33 mW; process variations; silicon photonic transmitter array; silicon resistors; size 130 nm; size 40 nm; static thermal control; CMOS integrated circuits; Modulation; Optical transmitters; Optical waveguides; Photonics; Silicon; Tuning;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State Circuits Conference (A-SSCC), 2013 IEEE Asian

Conference_Location

Singapore

Print_ISBN

978-1-4799-0277-4

Type

conf

DOI

10.1109/ASSCC.2013.6690976

Filename

6690976