Title :
A 0.5V 34.4uW 14.28kfps 105dB smart image sensor with array-level analog signal processing
Author :
Chin Yin ; Chih-Cheng Hsieh
Author_Institution :
Dept. of Electr. Eng., Nat. Tsing Hua Univ., Hsinchu, Taiwan
Abstract :
This paper proposes a 0.5V smart image sensor with multi-operation modes of edge extraction, centroid tracking, and high-dynamic-range imaging output. The 0.5V operated pulse-width-modulation (PWM) sensor [1] is applied to achieve a high dynamic range (HDR) response and reduce the fixed pattern noise (FPN). The array-level analog signal processing (ASP) is implemented by local inter-pixel feedback and the event-driven (ED) hand-shaking readout. A prototype chip of smart image sensor with 64×64 CIS array was fabricated in 0.18um CMOS technology. The prototype has been verified to demonstrate the features of real-time edge extraction, object tracking, and high-dynamic range imaging successfully. The measurement results show a power dissipation of 34.4uW in edge extraction mode, a frame rate of 14.28kfps and a tracking error of 0.36 pixels in centroid tracking mode, and a high dynamic range (DR) of 105dB in imaging mode.
Keywords :
CMOS image sensors; feature extraction; intelligent sensors; signal processing; CMOS; array-level analog signal processing; centroid tracking; edge extraction; event-driven hand-shaking readout; fixed pattern noise; high-dynamic range imaging; high-dynamic-range imaging; inter-pixel feedback; object tracking; power 34.4 muW; pulse-width-modulation sensor; size 0.18 mum; smart image sensor; voltage 0.5 V; Arrays; Feature extraction; Image edge detection; Image sensors; Pulse width modulation; Target tracking; CIS; HDR; edge extraction; tracking;
Conference_Titel :
Solid-State Circuits Conference (A-SSCC), 2013 IEEE Asian
Conference_Location :
Singapore
Print_ISBN :
978-1-4799-0277-4
DOI :
10.1109/ASSCC.2013.6690991