• DocumentCode
    658943
  • Title

    Pulse width controlled PLL/DLL using soft thermometer code

  • Author

    Nakura, Toru ; Asada, Kunihiro

  • Author_Institution
    VLSI Design & Educ. Center (VDEC), Univ. of Tokyo, Tokyo, Japan
  • fYear
    2013
  • fDate
    11-13 Nov. 2013
  • Firstpage
    345
  • Lastpage
    348
  • Abstract
    This paper demonstrates pulse width controlled PLL and DLL using a soft thermometer code. The oscillation frequency control in the PLL and the delay control in the DLL are conducted by a mostly digital with one bit analog code. Both of our PLL/DLL do not use an area-consuming capacitor, resulting in small silicon area implementation. A 65nm CMOS process uses only 120μm×30μm area for the PLL+DLL. They realized 2.80GHz operation consuming 1.35mW/4.65mW with 1.60ps/1.78ps rms jitter from the PLL/DLL output signals.
  • Keywords
    CMOS integrated circuits; digital phase locked loops; frequency control; oscillations; thermometers; CMOS process; delay control; frequency 2.80 GHz; one bit analog code; oscillation frequency control; power 1.35 mW; power 4.65 mW; pulse width controlled DLL; pulse width controlled PLL; size 65 nm; soft thermometer code; time 1.60 ps; time 1.78 ps; Clocks; Delays; Oscillators; Phase frequency detector; Phase locked loops; Voltage control;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State Circuits Conference (A-SSCC), 2013 IEEE Asian
  • Conference_Location
    Singapore
  • Print_ISBN
    978-1-4799-0277-4
  • Type

    conf

  • DOI
    10.1109/ASSCC.2013.6691053
  • Filename
    6691053