A 1.56mW 50MHz 3rd-order filter with current-mode active-RC biquad and 33dBm IIP3 in 65nm CMOS

Author

Palani, Rakesh Kumar ; Sturm, Martin ; Harjani, Ramesh

Author_Institution

Dept. of Electr. & Comput. Eng., Univ. of Minnesota, Minneapolis, MN, USA

fYear

2013

fDate

11-13 Nov. 2013

Firstpage

373

Lastpage

376

Abstract

A novel inverter-based-integrator filter design is proposed that relaxes the UGB requirement of the OTAs by decoupling the integration capacitance from the feedback loop. The proposed scheme allows the entire filtering operation to take place in the current domain reducing power supply limitations. Further, in the design the load acts as the compensation capacitance to the OTAs allowing the majority of the current to flow into the load, increasing the overall power efficiency. As a proof of concept, a 3rd order lowpass filter is designed and implemented in an IBM 65nm CMOS process. The measured prototype designed for a 50MHz bandwidth achieves an IIP3 of +33dBm and 1.8X better FOM over state-of-art while drawing 1.3mA from a 1.2V supply, is capable of driving a lpF load, and occupies 6X smaller area.

Keywords

CMOS integrated circuits; biquadratic filters; feedback; integrating circuits; low-pass filters; operational amplifiers; CMOS integrated circuit; IIP3; OTA; UGB requirement; bandwidth 50 MHz; current 1.3 mA; current mode active RC biquad; feedback loop; integration capacitance decoupling; inverter based integrator filter; low-pass filter; power 1.56 mW; size 65 nm; third order filter; voltage 1.2 V; Butterworth; active filters; active-RC; biquad; current-mode; filters; gm-C; integrator; lowpass;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State Circuits Conference (A-SSCC), 2013 IEEE Asian

Conference_Location

Singapore

Print_ISBN

978-1-4799-0277-4

Type

conf

DOI

10.1109/ASSCC.2013.6691060

Filename

6691060