Design of VCO using bump structure for high-power harmonics

Author

Yoon Jae Bae ; Nam Hwi Jeong ; Choon Sik Cho

Author_Institution

Sch. of Electron., Telecommun. & Comput. Eng., Korea Aerosp. Univ., Goyang, South Korea

fYear

2013

fDate

5-8 Nov. 2013

Firstpage

763

Lastpage

765

Abstract

In this paper, we propose a VCO using the negative resistance property of bump structure. The proposed VCO consists of a bump circuit and an LC resonator for obtaining high powers at the harmonic frequencies. The VCO is designed in 0.13μm RF CMOS process. The VCO works at the center frequency of 3.35GHz with -2.1dBm output power while this circuit consumes 20mW with 1.2 V supply. Due to the negative resistance of bump circuit, second and third harmonics with high output power are achieved as -6.42dBm and -18.39 dBm respectively.

Keywords

CMOS analogue integrated circuits; LC circuits; harmonics; low-power electronics; radiofrequency integrated circuits; radiofrequency oscillators; voltage-controlled oscillators; LC resonator; RF CMOS process; VCO design; bump circuit; bump structure; frequency 3.35 GHz; high-power harmonics; negative resistance property; power 20 mW; size 0.13 mum; voltage 1.2 V; voltage controlled oscillators; CMOS integrated circuits; Harmonic analysis; Phase noise; Power system harmonics; Resistance; Resonant frequency; Voltage-controlled oscillators; LC oscillators; RF CMOS; VCO; bump circuit; high-power harmonics;

fLanguage

English

Publisher

ieee

Conference_Titel

Microwave Conference Proceedings (APMC), 2013 Asia-Pacific

Conference_Location

Seoul

Type

conf

DOI

10.1109/APMC.2013.6694923

Filename

6694923