Title :
A low-power wideband dual-feedback LNA exploiting the gate-inductive bandwidth/gain-enhancement technique
Author :
Hung-Ting Chou ; Shin-Wei Chen ; Hwann-Kaeo Chiou
Author_Institution :
Dept. of Electr. Eng., Nat. Central Univ., Jhongli, Taiwan
Abstract :
A novel wideband dual-feedback low noise amplifier (LNA) implemented in standard 0.18 μm CMOS process is proposed in this paper. The proposed dual feedback topology can improve the total noise contribution for LNA design. By exploiting the gate-inductive bandwidth gain-enhancement (GIBE) technique, the LNA can extend the more than 30 % bandwidth and enhance gain an overall bandwidth of DC to 5 GHz. Besides, the fabricated LNA with the current-mirror circuit consumes a power of 10.4 mW. The proposed LNA achieves an average gain of 13.9 dB and a minimum noise figure (NF) of 2.76 dB from DC to 5 GHz. The LNA achieves a good figure-of-merit (FoM) of 3.8. The chip area is 0.45 mm2 with all pads and dummy blocks.
Keywords :
CMOS integrated circuits; circuit feedback; current mirrors; integrated circuit design; low noise amplifiers; low-power electronics; microwave amplifiers; CMOS process; LNA design; bandwidth 0 GHz to 5 GHz; current-mirror circuit; dual feedback topology; gate-inductive bandwidth/gain-enhancement technique; low-power wideband dual-feedback LNA; noise contribution; noise figure; power 10.4 mW; size 0.18 mum; wideband dual-feedback low noise amplifier; CMOS integrated circuits; Gain; Logic gates; Noise measurement; Transistors; Wideband; CMOS LNA; feedback; gate-inductive bandwidth gain-enhancement;
Conference_Titel :
Microwave Symposium Digest (IMS), 2013 IEEE MTT-S International
Conference_Location :
Seattle, WA
Print_ISBN :
978-1-4673-6177-4
DOI :
10.1109/MWSYM.2013.6697349
