High performance 1.8–2.4 GHz phase shifter using silicon-on-sapphire digitally tunable capacitors

This paper introduces the design and implementation of a high performance phase shifter using 5-bit Digitally Tunable Capacitors (DTC) and a miniature surface-mount quadrature 3dB coupler. The phase shifter covers > 85^o of phase shift from 1.8-2.4 GHz, with an average insertion loss (IL) of 0.7+/-0.3 dB at mid-band, and 2° phase resolution using two asynchronously tuned DTC over the states with S₁₁ <; -10dB. The measured IP3 is > 58 dBm across all states and the 1 dB power compression point (P1dB) is 10W over the major states. The overall size for the entire circuit is approximately 1 cm². We believe this hybrid phase shifter represents state-of-art power handling, linearity, insertion loss, phase shift resolution, operational bandwidth and small size for phase-shifter designs using any phase-shifter topologies and fabrication technologies.