Title :
Design considerations for stacked Class-E-like mmWave high-speed power DACs in CMOS
Author :
Chakrabarti, Anandaroop ; Krishnaswamy, Harish
Author_Institution :
Dept. of Electr. Eng., Columbia Univ., New York, NY, USA
Abstract :
This work describes design considerations for realizing high power mmWave DACs with high efficiency under modulation based on switching-PA DAC cells. A stacked Class-E-like SOI CMOS power amplifier is turned ON/OFF by means of digital circuitry to sustain high-speed 1-bit ASK (OOK) modulation, while high average efficiency is achieved by means of supply-switching. Factors affecting modulation speed, dynamic power dissipation, impact of digital path delays and supply/ground bounce are discussed and design guidelines are provided. A fully-integrated 47GHz prototype has been fabricated in IBM´s 45nm SOI CMOS technology. Measurement results yield a saturated output power of 18.2 dBm with a peak PAE of 15.3% under static (continuous-wave) operation, and high-speed OOK modulation (upto 1Gbps and beyond) is demonstrated with high average efficiency.
Keywords :
CMOS integrated circuits; MMIC power amplifiers; amplitude shift keying; digital-analogue conversion; field effect MMIC; silicon-on-insulator; ASK modulation; IBM SOI CMOS technology; OOK modulation; SOI CMOS power amplifier; digital circuitry; digital path delays; frequency 47 GHz; high power mmWave DAC; mm-wave high-speed power DAC; power dissipation; size 45 nm; stacked class-E-like DAC; supply-switching; switching-PA DAC cells; word length 1 bit; CMOS integrated circuits; Capacitors; Clocks; Logic gates; Modulation; Power generation; Switches;
Conference_Titel :
Microwave Symposium Digest (IMS), 2013 IEEE MTT-S International
Conference_Location :
Seattle, WA
Print_ISBN :
978-1-4673-6177-4
DOI :
10.1109/MWSYM.2013.6697742
