Comparative modeling study of single-ended through-silicon via between the G-S and G-S-G configuration

This paper presents a comparative modeling of single-ended (SE) through silicon via (TSV) between the G-S and G-S-G configuration. The simulation based on a 3D quasi-static field solver indicates that the use of two ground TSVs produces greater parasitic capacitance and conductance in the silicon substrate. However, because of the increase of the parasitic capacitance, the parasitic inductance of the SE TSV is reduced to maintain the same phase velocity in silicon. According to the modeled results, the G-S-G configuration has a larger insertion loss due to a higher substrate conductance when compared to the G-S configuration. Nonetheless, when measured with the coaxial probes, the G-S-G configuration exhibits a larger measurement bandwidth than the G-S configuration. Finally, wideband S-parameter measurements with the help of a double-sided probing system can validate the modeled results at frequencies up to 50 GHz in the G-S-G configuration.