Solder joint fatigue model for large silicon interposers

This paper is dedicated to thermomechanical simulations for the development of a solder joint fatigue model for large silicon interposers. Works were conducted in the frame of silicon platform developments for heterogeneous RF or MEMS 3D modules, where the silicon interposer could be larger than conventional WLCSP. TCoB tests have been carried out on 14.6 mm×14.6 mm×0.4 mm silicon interposer with an 800 μm pitch following JEDEC standards for board design and thermal cycles. Four configurations focused on passivation layers at solder joint/Si level have been studied. The results enable to calibrate a solder joint fatigue model for such interposers. FEM has been carried out using ANSYS software and Anand model for the solder viscoplastic behavior law. Possible models are reviewed, and our choices for a strain-based model or an energy-based model are justified. Finally a power law is used to relate experimental lifetime to damage parameters.