Flip chip market and technology trends

The flip chip market is currently experiencing strong growth, at a compound annual rate (CAGR) of 19%, thanks in large part to copper pillar and microbumping metallurgy advances for expanded use in memory, consumer electronics, and mobile phones. Flip chip technology continues to evolve and is playing a large role in 2.5D interposers and 3DICs. Flip chip technology isn´t new. First introduced by IBM more than 30 years ago, some may consider the flip chip to be a rather unexciting, mature technology. But the reality is that flip chip technology is able to adapt to meet new challenges, as new bumping solutions continue to be developed to serve the most advanced packaging technologies, such as 2.5D interposers and 3DICs. Significantly, any advanced packaging technologies available today conclude with bumping. In 2012, bumping technologies accounted for 81% of the total installed capacity in the semiconductor industry´s “middle-end,” the blurred line of overlap between the front- and back-end. This is a large amount of capacity, representing more than 14 million 12-inch equivalent wafers. Fab loading rates are high as well, especially for the copper pillar platform (88%). The flip chip market remains quite valuable: It was worth $20B in 2012, making it the largest market in the middle-end. This market growth is expected to continue at a rate of 11%, ultimately reaching $35B by 2018. Flip chip capacity is also forecasted to grow over the next five years in response to increased demand from three areas: 1) CMOS 28nm ICs, including new applications such as application processors (APE) and baseband (BB) modules; 2) Next-generation DDR memory; and 3) 2.5D interposers/3DICs using microbumping. Driven by these applications, copper pillar technology is quickly becoming established as the “interconnect of choice” for flip chips. Expect to see new flip chip packaged ICs radically alter the market landscape with specific applications that will in- rease demand for wafer bumping. In the context of 3D integration and the “More than Moore” approach, flip chip technology is considered to be a key building block that can enable more sophisticated system-on-chip integration. Flip chip technology is being reshaped by the demand for copper pillars and microbumps, which are quickly becoming the new mainstream bumping metallurgy solutions for die interconnections. Along with mainstream bumping technologies, this paper focuses on copper pillar bumping, which is becoming increasingly popular for a wide variety of applications. The adoption of copper pillars is motivated by the combination of factors: It has very fine pitch, no under bump metallization (UBM) is required, and it offers a high Z standoff. In terms of copper pillar flip chip growth, a 35% CAGR in wafer count is forecasted between 2010 to 2018. Intel, the leading flip chip producer, already has high production levels. For perspective, by 2014, more than half of all bumped wafers for flip chips will be made with copper pillars. In early 2013, microbumping for 2.5D interposers and 3DICs, in conjunction with new applications like APE and DDR memory, began boosting flip chip demand and creating new challenges and corresponding solutions. Today, flip chips are available in a wide range of pitches to meet specific application needs.