Anti-counterfeit Integrated Circuits using fuse and tamper-resistant time-stamp circuitry

Counterfeit Integrated Circuits (ICs) have become an important security issue in recent years, in which counterfeit ICs that perform incorrectly or sub-par to the expected can lead to catastrophic consequences in safety and/or mission-critical applications, in addition to the tremendous economic toll they incur to the semiconductor industry. In this paper, we propose two novel methods to validate the authenticity of ICs. First, a fuse with a charge pump is proposed to serve as a “seal” for the IC, in which any functional use will break the seal, and the broken seal is extremely hard to replace. Second, a novel time-stamp is proposed that can provide the date at which the IC was manufactured. The time-stamp circuitry is constructed using a Linear-Feedback Shift-Register (LFSR) such that any small change to the circuit would result in an entirely different date either in a distant past or future, beyond the lifetime of a typical IC. Furthermore, we propose a second layer of tamper resistance to the time-stamp circuit to make it even more difficult to modify. Results show that with about 8.8% area overhead in AES implementation, the adversary requires more than 10¹¹⁸ different trials to successfully tamper time-stamp circuit. These techniques are easy to implement and embed into the circuit using todays technologies, while extremely difficult to modify or tamper with by the adversary. Finally, the method can be combined with additional hardware to detect malicious alteration made in the circuit.