DocumentCode
666088
Title
Design methodology for face detection acceleration
Author
Acasandrei, Laurentiu ; Barriga, Angel
Author_Institution
IMSE (Inst. de Microelectron. de Sevilla), CNM, Sevilla, Spain
fYear
2013
fDate
10-13 Nov. 2013
Firstpage
2238
Lastpage
2243
Abstract
A design methodology to accelerate the face detection for embedded systems is described, starting from algorithm optimization (high level) and ending with software and hardware codesign (low level) by addressing the issues and the design decisions made at each level based on the performance measurements and system limitations. The implemented embedded face detection system consumes very little power compared with the traditional PC software implementations while maintaining the same detection accuracy. The proposed face detection acceleration methodology is suitable for real time applications.
Keywords
embedded systems; face recognition; hardware-software codesign; algorithm optimization; design methodology; embedded systems; face detection acceleration; real time applications; software-hardware codesign; Acceleration; Detectors; Face; Face detection; Hardware; IP networks; Software; design methodology; embedded system; face detection; hardware & software codesign;
fLanguage
English
Publisher
ieee
Conference_Titel
Industrial Electronics Society, IECON 2013 - 39th Annual Conference of the IEEE
Conference_Location
Vienna
ISSN
1553-572X
Type
conf
DOI
10.1109/IECON.2013.6699479
Filename
6699479
Link To Document