Title :
Design of a low-power digital processor for a security passive RFID tag
Author :
Taehun Ki ; Hyunseok Kim ; Chelho Chung ; Young-Han Kim ; Kyusung Bae ; Jongbae Kim
Author_Institution :
SoC Team, LS Ind. Syst. Co., Ltd., Anyang, South Korea
Abstract :
A digital processor in secure RFID tag is designed to support a cryptographic data communication between an interrogator and a tag. The AES OFB-like algorithm is used for a cryptographic data communication. The digital processor is fully compatible with the EPC C1 G2 protocol. The power consumption of the digital processor is optimized to maintain the minimum sensitivity level for both the insecure and secure communication. In the simulation results, the power consumption is 2.43μW and 3.14μW in the insecure and the secure communication, respectively.
Keywords :
CMOS digital integrated circuits; circuit feedback; cryptography; low-power electronics; passive networks; radiofrequency identification; AES OFB-like algorithm; CMOS technology; EPC C1 G2 protocol; advanced encryption standard; cryptographic data communication; low-power digital processor; output feedback mode; power 2.43 muW; power 3.14 muW; power consumption; security passive RFID tag; Clocks; Cryptography; Engines; Power demand; Protocols; Radiofrequency identification; A security RFID tag; Advanced Encryption Standard (AES); Low power CMOS digital circuit;
Conference_Titel :
Industrial Electronics Society, IECON 2013 - 39th Annual Conference of the IEEE
Conference_Location :
Vienna
DOI :
10.1109/IECON.2013.6700023
