DocumentCode
667689
Title
A low-power 2nd-order CT ΔΣ modulator with a single operational amplifier
Author
Radjen, Dejan ; Andreani, Pietro ; Anderson, Matthew ; Sundstrom, Lars S.
Author_Institution
Dept. of Electr. & Inf. Technol., Lund Univ., Lund, Sweden
fYear
2013
fDate
11-12 Nov. 2013
Firstpage
1
Lastpage
4
Abstract
This paper presents a multi-bit continuous-time ΔΣ modulator intended for ultra low power radios. The modulator features a 2nd order loop filter implemented with a single operational amplifier to reduce the power consumption. Furthermore, a 4-bit quantizer is used to achieve high resolution at a low oversampling ratio of 16. The ΔΣ modulator has been implemented in a 65nm CMOS process. Simulation results show a peak SNDR of 65 dB over a 500 kHz signal bandwidth, while consuming 76 μW from a 800 mV power supply.
Keywords
CMOS analogue integrated circuits; delta-sigma modulation; filters; low-power electronics; operational amplifiers; 2nd order loop filter; CMOS process; low-power 2nd-order CT ΔΣ modulator; multibit continuous-time ΔΣ modulator; noise figure 65 dB; power 76 muW; power consumption; single operational amplifier; size 65 nm; ultralow power radio; voltage 800 mV; word length 4 bit; Bandwidth; Gain; Modulation; Resistors; Signal to noise ratio; Transfer functions;
fLanguage
English
Publisher
ieee
Conference_Titel
NORCHIP, 2013
Conference_Location
Vilnius
Type
conf
DOI
10.1109/NORCHIP.2013.6702043
Filename
6702043
Link To Document