Device physics aware 3D electromagnetic simulation of Through-Silicon-Vias in system modeling

Three dimensional integrated circuits (3DICs) are generating considerable interest as a way to increase speed and density while reducing power and form factor. Among the different forms of 3D integration, the use of Through Silicon Vias (TSV) with micro-bumps in a passive interposer is a popular choice in applications ranging from wide IO memory to heterogeneous integration. Current compact modeling strategy aims at modeling TSVs with circuit elements whose values are typically computed from analytical expressions. This technique therefore does not capture system level coupling effects like TSV-Redistribution Layer (RDL) coupling. This paper presents a device physics aware 3D electromagnetic modeling of TSV structures with the capability of modeling full systems including coupling between conventional package-board layers and TSV embedded passive interposers, towards accurate signal and power integrity analysis and design.