Title :
Very low-voltage swing while high-bandwidth data transmission through 4096 bit TSVs
Author :
Takaya, Satoshi ; Nagata, M. ; Ikeda, Hinata
Author_Institution :
Grad. Sch. of Syst. Inf., Kobe Univ., Kobe, Japan
Abstract :
A three tier, three dimensional chip stack forms wide I/O test vehicle and demonstrates 100 GByte/sec in vertical data channels with 4096 bit TSVs. The operation is stable for the wide range of supply voltage from 0.75 V to 1.2 V. An in-place waveform capture and a built-in self test mechanism embody on-chip diagnosis of high-bandwidth data transmissions, by monitoring signal waveforms as well as measuring eye openings and bit error rates.
Keywords :
built-in self test; integrated circuit testing; three-dimensional integrated circuits; I/O test vehicle; TSVs; bit error rates; built-in self test mechanism; byte rate 100 GByte/s; eye openings; high-bandwidth data transmission; high-bandwidth data transmissions; in-place waveform capture; on-chip diagnosis; signal waveform monitoring; three dimensional chip stack; vertical data channels; very low-voltage swing; voltage 0.75 V to 1.2 V; word length 4096 bit; Capacitance; Pins; Power supplies; System-on-chip; Three-dimensional displays; Through-silicon vias; Vehicles; In-place waveform capture; On-chip diagnosis; Through silicon via; Wide I/O bus;
Conference_Titel :
3D Systems Integration Conference (3DIC), 2013 IEEE International
Conference_Location :
San Francisco, CA
DOI :
10.1109/3DIC.2013.6702359
