DocumentCode :
668002
Title :
Characterization and optimization of a TSV CMP reveal process using a novel wafer inspection technique for detecting sub-monolayer surface contamination
Author :
Chew, Jason ; Mahajan, Uday ; Bajaj, Rajeev ; Mirshad, Iad ; Newcomb, Robert
Author_Institution :
Applied Materials, 10 Science Park Road, Singapore 117684
fYear :
2013
fDate :
2-4 Oct. 2013
Firstpage :
1
Lastpage :
6
Abstract :
Through Silicon Vias (TSV) is a key technology for advanced 3DIC packaging, enabling improved device performance, integration of multiple functions in a single package and form factor reduction. TSV reveal CMP is one of the key processes in this integration scheme [1].
fLanguage :
English
Publisher :
ieee
Conference_Titel :
3D Systems Integration Conference (3DIC), 2013 IEEE International
Conference_Location :
San Francisco, CA, USA
Type :
conf
DOI :
10.1109/3DIC.2013.6702372
Filename :
6702372
Link To Document :
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