3D-IC dynamic thermal analysis with hierarchical and configurable chip thermal model

The thermal response in 3D-IC is important for its impact on chip sign-off for thermal sensor placement, Tmax control, and thermal-aware electro-migration (EM). Thermal responses in 3D-IC, for either steady state or transient, are strongly coupled with surrounding components, i.e., package, board, and system. This study verified that in a chip-package-system (CPS) 3D-IC environment, the time it took to reach a steady state in chip thermal dynamics can take more than tens of seconds or longer, instead of the mili, micro, or nano seconds seen in many articles using a chip-only thermal model. High frequency power oscillations will not lead to significant temperature variations in chips, due to the high thermal capacitance in the surrounding environment. The most practical power modes for dynamic thermal analysis are the average ones in chip activities, e.g., Chip Thermal Model (CTM), based on either vectorless or event-driven activities in a chip. CTMs for 3D-IC can be implemented in a hierarchical or configurable way. With power activities on and off in sequence, transient responses in 3D-IC can be simulated efficiently using Green´s functions of power-on transients. Sample cases of thermal analysis based on power modes from different operating activities, and high-low power switching are presented here.