DocumentCode :
668868
Title :
The realization of multifunctional high speed and high frequency signal processing veneer
Author :
Cheng Chen ; Wenjun Li
Author_Institution :
Res. Inst. of Microelectron. CAD, Hangzhou Dianzi Univ., Hangzhou, China
fYear :
2013
fDate :
20-22 Nov. 2013
Firstpage :
695
Lastpage :
698
Abstract :
The veneer based on the implementation of AD9558 chip can realize the clock signal level conversion, phase shift and trigger delay functional. According to final results of the veneer debugging, it can output these following signal levels: LVDS, LVCMOS, HSTL and LVTTL, can receive these following signal levels: LVDS, LVPECL, LVTTL and CML, can realize 1 ~ 65535 ms signal trigger delay, can realize signal 0 ~ 360 degrees (or 0 ~5 × 10^8ps) phase shift, and can output maximum 600 MHz clock signals.
Keywords :
CMOS digital integrated circuits; clocks; signal processing; synchronisation; trigger circuits; AD9558 chip; HSTL signal; LVCMOS signal; LVDS signal; LVTTL signal; clock signal level conversion; high frequency signal processing veneer; multifunctional high speed signal processing; phase shift; signal trigger delay; veneer debugging; Clocks; Delays; Frequency conversion; Radio frequency; Registers; Resistance; Voltage-controlled oscillators; clock; high frequency; high precision; phase shift; trigger delay;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Consumer Electronics, Communications and Networks (CECNet), 2013 3rd International Conference on
Conference_Location :
Xianning
Print_ISBN :
978-1-4799-2859-0
Type :
conf
DOI :
10.1109/CECNet.2013.6703426
Filename :
6703426
Link To Document :
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