DocumentCode
669768
Title
Design and evaluation of a media-oriented vector processor with a multi-banked cache memory
Author
Ye Gao ; Shoji, Naoki ; Egawa, R. ; Takizawa, Hiroyuki ; Kobayashi, Hideo
Author_Institution
Grad. Sch. of Inf. Sci., Tohoku Univ., Sendai, Japan
fYear
2013
fDate
3-4 Oct. 2013
Firstpage
78
Lastpage
87
Abstract
Vector processors have significant advantages for next generation multimedia applications (MMAs). One of them is that vector processors can achieve a high data transfer performance and thus a high computing performance by using a high bandwidth memory sub-system. However, their high bandwidth memory sub-systems usually lead to enormous costs in terms of chip area, power consumption and energy consumption. These costs are too expensive for an embedded computer system, which is the main execution platform of MMAs. In order to enable an embedded computer system to exploit the high memory bandwidth and thus the high performance of the vector architecture, this paper proposes a media-oriented vector processor (MVP) with a multi-banked cache memory (MVP-cache). Different from conventional multi-banked cache memories, MVP-cache makes multiple independent data arrays of small size cache lines share one tag array. In this way, MVP-cache can consume less static power consumption on its tag arrays because of the reduction in the tag array size. MVP-cache can also achieve a high efficiency on short vector data transfers because the flexibility of data transfers can be improved by independently controlling the data transfers of each data array. Moreover, in order to fully exploit the bandwidth of MVP-cache, MVP also introduces an out-of-order vector processing mechanism. By using these mechanisms, MVP expands the potential of vector architectures on media processing in embedded computer systems.
Keywords
cache storage; embedded systems; multimedia computing; power aware computing; vector processor systems; MMAs; MVP-cache; data transfer performance; embedded computer system; energy consumption; high computing performance; independent data arrays; media processing; media-oriented vector processor; memory subsystem; multibanked cache memory; multimedia applications; out-of-order vector processing mechanism; power consumption; short vector data transfers; tag array size reduction; vector architectures; Arrays; Bandwidth; Cache memory; Data transfer; Pipelines; Registers; Vectors;
fLanguage
English
Publisher
ieee
Conference_Titel
Embedded Systems for Real-time Multimedia (ESTIMedia), 2013 IEEE 11th Symposium on
Conference_Location
Montreal, QC
Type
conf
DOI
10.1109/ESTIMedia.2013.6704506
Filename
6704506
Link To Document